- 1 Preface
- 2 Block diagram & PCB
- 3 CPU
- 4 MEMORY
- 5 Display
- 6 Wifi & Bluetooth
- 7 Audio Codec
- 8 Power Supply
- 9 Accelerometer
- 10 Touch switch (Sound volume up/down)
- 11 JTAG
- 12 Others
This page contains major component information of Odroid.
- If you buy Odroid, full schematics is supplied with SD-CARD.
S5PC100 is a 32-bit RISC low power, high performance micro-processor solution for mobile phones and general applications, and integrates 833Mhz CortexA8 which implements the ARM architecture V7-A with numerous peripherals to support. To provide optimized H/W performance for the 3G & 3.5G communication services, S5PC100 adopts a 64-bit internal bus architecture and includes many powerful hardware accelerators for tasks such as motion video processing, display control and scaling. Integrated Multi Format Codec (MFC) supports encoding and decoding of MPEG4, H.263, H.264 and decoding of MPEG2, VC1, Divx/Xvid. This H/W Encoder/Decoder supports real-time video conferencing and Analog TV out for NTSC and PAL mode, HDMI output for HDTVThe S5PC100 has an optimized interface to external memory capable of sustaining the demanding memory bandwidth required in high-end communication services. The memory system has Flash/ROM external memory ports for parallel access and DRAM port for high bandwidth. DRAM port can be configured to support mobile DDR, LPDDR2, and DDR2. Flash/ROM Port supports SLC/MLC NAND Flash, NOR Flash, OneNAND and ROM type external memory.OverviewTo reduce total system cost and enhance overall functionality, S5PC100 includes many hardware peripherals such as TFT 24-bit true color LCD controller, Camera Interface, MIPI DSI, CSI-2 and HSI, System Manager for power management, CF+/ATA I/F, 4-channel UART, 24-channel DMA, 4- channel Timers, configurable General I/O Ports, 3-ch IIS, 2-ch S/PDIF, 2-ch CAN bus, IIC bus interface, 3-ch HS-SPI, USB Host 1.1 operating at full speed(12Mbps), USB OTG 2.0 operating at high speed (480Mbps), 3-ch SD Host & High Speed Multi-Media Card Interface and PLLs for clock generation.
- CortexA8 based CPU Subsystem with NEON
- 32/32KB I/D Cache, 256KB L2 Cache
- 833MHz Operating Frequency
- 64-bit Multi-layer bus architecture
- Advanced power management for mobile applications
- ROM for secure booting and RAM for security function
- 8-bit ITU 601/656 Camera Interface up to 8M pixel for scaled and 16M pixel for un-scaled resolution
- Multi Format CODEC provides encoding and decoding of MPEG-4/H.263/H.264up to 30fps@HD(720p) and decoding of MPEG-2/VC1/Divx/Xvid video up to 30fps@HD(720p)
- JPEG codec support up to 30Mpixels/s
- 3D Graphics Acceleration with Programmable Shaderup to 10M triangles/s (Transform only)
- 2D Graphics Acceleration with BitBlitand Rotation, up to 40Mpixels/s
- 1/2/4/8 bpppalletized or 8/16/24bpp non-palletized Color-TFT support up to 2048x2048
- TV-out for NTSC and PAL mode and HDMI 1.2 interface support with PHY
- MIPI-HSI, MIPI-DSI and MIPI-CSI interface support
- 1-channel AC-97 audio codec interface, 2-ch PCM serial audio interface, and 3-channel 24-bit I2Sinterface support (5.1ch support)
- 2-channel S/PDIF interface support for digital audio
- 2-channel I2C interface (up to 400KHz) support including 1-channel for HDMI
- 3-channel HS-SPI, up to 52Mbps
- 4-channel UART including 4Mbps port for Bluetooth 2.0 and IrDA port for SIR/MIR/FIR
- On-chip USB 2.0 OTG supporting high speed (480Mbps, on-chip transceiver)
- On-chip USB 1.1 Host supporting full speed (12Mbps, on-chip transceiver)
- Asynchronous direct Modem Interface support including 16KB DPRAM
- 3-channel SD/SDIO/HS-MMC interface support including CE-ATA
- CF version 3.0 interface support for HDD
- 24-channel DMA controller
- Support 8x8 key matrix
- 10-ch 12-bit multiplexed ADC
- 2-ch CAN interface
- Configurable GPIOs
- Real time clock, PLL, timer with PWM and watch dog timer
- Memory Subsystem
- SRAM/ROM/NOR/NAND Interface with x8 or x16 data bus
- MuxedOneNANDInterface with x16 data bus
- 1-port Mobile DDR Interface with x32 data bus (up to 333Mbps/pin DDR)
- 1-port DDR2 interface with x16 or x32 data bus (333Mbps/pin DDR)
- 1-port LPDDR2 interface (up to 333Mbps/pin DDR)
Hynix DDR2 memory chips provides 512MB RAM which opens up a wide range of production and development opportunities. DDR2 memory consumes more power than MobileDDR. But, it is pretty much cost effective for huge memory space.
You can choose memory vendor for example Samsung/Hynix/Elpida/Micron or others due to PC industry standard. DDR2 8Bit-bus-width memory is being used for PC/Notebook memory module.
Each chip has 8-bit data-bus-width with 128MB. We mounted 4 chips to make 32bit data bus and total memory size is 512MB.
Very useful application note for engineers. DDR2_device_operation&timing_diagram(Rev.0.1).pdf (847.7 KB)
Traditional memory(Like NOR-FLASH / NAND-FLASH) can't be found in Odroid. Odroid has totally different booting method. Odroid implements direct T-Flash booting with excellent iROM feature of S5PC100.
Odroid has 2Gbyte T-flash(removable) memory card for system area. Assume it has 3,862,528 blocks(sectors) and each block has 512bytes.
|Area Name||Size in bytes||From(sector #)||To(Sector #)||Partition Name|
|U-boot Envi. variables||16K||3862478||3862509|
|EXT3 for Recovery System||256MB||2632272||3156560||mmcblkp3|
|EXT3 for Android system||256MB||2102792||2632271||mmcblkp2|
|EXT3 for Android user data||1GB||62||2102791||mmcblkp1|
|Partition table / BPB||31K||0||61|
Reserved area will be used for FW update and Recovery purpose.
At this moment, Google Android supports only FAT32 file system. Other file system can be considered for big size 720p-HD contents. 2GB/4GB/8GB seems to be working well. But, 16GB memory card has some compatibility issues.
Odroid has 2 memory cards.
- T-flash card contains boot-loader, kernel, Android system and applications.
- SD card contains user files such as pictures, music, video clips and so on.
- LMS350DF01-001 is a TMR(Transmissive with Micro Reflective) type color active matrix TFT (Thin Film Transistor) liquid crystal display (LCD) that uses amorphous silicon TFT as a switching devices.
- This model is composed of a TFT- LCD module, a driver circuit and a back-light unit.
- The resolution of a 3.5" contains 320 x 480 dots and can display up to 16,777,216 colors.
This elegant combination from Fujitsu Component, based on Marvell's industry leading 88W8686 and CSR's BC4, brings both 802.11(b/g) and Bluetooth to the Odroid.MBH7BWZ04_specification_rev10_20091015.pdf (261.94 KB)
- Do not distribute/spread this file.
- Wireless Modules, Others
- Global Marketing 4 Division
The WM8991 is a highly integrated low power hi-fi CODEC from Wolfson. A powerful 1W speaker driver can operate in class D or AB modes. Stereo 24-bit sigma-delta ADCs and DACs provide hi-fi quality audio record and playback, with a flexible digital audio interface.
PMIC MAX8698C supplies important power rails of S5PC100 and other devices. It contains 3 Step-down DC/DCs and 9 LODs.
Max8698C_datasheet_Rev8.pdf (440.61 KB)
Recently we've got the permission of posting this datasheet from Maxim. But, the permission is limited to this home page. Do not distribute/spread this file to anywhere.
Special thanks: Maxim people.
Odroid reads reliable battery level information from dedicated Li+ battery gauge Max17040 from Maxim.
MAX17040.pdf (437.38 KB)
The digital 3-axial acceleration sensor of Bosch Sensortec is included in Odroid.
BMA150.pdf (681.08 KB)
Odroid volume switches are implemented with touch sensitive IC TS01 from AD-semiconductor.
Datasheet can be found on this link. http://touch-on.co.kr/board/bbs/board.php?bo_table=touchsensor&wr_id=18
CAUTION: To connect JTAG emulator, you need to open the case and solder many wires.
This process can break touch screen flat cable. The touch screen flat cable is really weak.
Note that "This work should be done with your own risk. Any warranty will be completely gone away.
This picture shows JTAC connection. There are 20 pins of JTAG. Front side has 10pins and rear side has 10pins. You can find CON1 in the ODROID schematics page-6.